1. Technical Field of the Invention
The invention relates generally to communication systems; and, more particularly, it relates to decoding of signals within such communication systems.
2. Description of Related Art
Data communication systems have been under continual development for many years. One such type of communication system that has been of significant interest lately is a communication system that employs turbo codes. Another type of communication system that has also received interest is a communication system that employs LDPC (Low Density Parity Check) code. A primary directive in these areas of development has been to try continually to lower the error floor within a communication system. The ideal goal has been to try to reach Shannon's limit in a communication channel. Shannon's limit may be viewed as being the data rate to be used in a communication channel, having a particular SNR (Signal to Noise Ratio), that achieves error free transmission through the communication channel. In other words, the Shannon limit is the theoretical bound for channel capacity for a given modulation and code rate.
LDPC code has been shown to provide for excellent decoding performance that can approach the Shannon limit in some cases. For example, some LDPC decoders have been shown to come within 0.3 dB (decibels) from the theoretical Shannon limit. While this example was achieved using an irregular LDPC code of a length of one million, it nevertheless demonstrates the very promising application of LDPC codes within communication systems.
Typical encoding of LDPC coded modulation signals is performed by generating a signal that includes symbols each having a common code rate and being mapped to a singular modulation. That is to say, all of the symbols of such an LDPC coded modulation signal have the same code rate and the same modulation (the same constellation having a singular mapping). Oftentimes, such prior art encoding designs are implemented as to maximize the hardware and processing efficiencies of the particular design employed to generate the LDPC coded modulation signal having the single code rate and single modulation for all of the symbols generated therein.
With respect to decoding of such LDPC coded modulation signals, decoding is most commonly performed based on a bipartite graph of a given LDPC code such that the graph includes both bit nodes and check nodes. The I, Q (In-phase, Quadrature) values associated with received symbols are associated with a symbol node, and that symbol node is associated with corresponding bit nodes. Bit metrics are then calculated for the individual bits of the corresponding symbols, and those bit metrics are provided to the bit nodes of the bipartite graph of the given LDPC code. Edge information corresponding to the edges that interconnect the bit nodes and the check nodes is calculated, and appropriately updated, and communicated back and forth between the bit nodes and the check nodes during iterative decoding of the LDPC coded signal. Within such typical decoding systems, the bit metric values that are employed are fixed values and used repeatedly in the iterative decoding processing. As such, the performance of such prior art, bit only decoding approaches is inherently limited and may require more iterations to converge on a best estimate of information contained within an LDPC coded modulation signal.
Moreover, the manner by which decoding of these LDPC coded signals is performed typically involves updating the corresponding edge messages using an alternating processing approach by which all of the edge messages with respect to check nodes are updated and then all of the edge messages with respect to bit nodes are updated, and back and forth and so on. This iterative decoding processing (e.g., updating of the edge messages) is back and forth from the perspective of the bit nodes and the check nodes. A certain degree of latency can be introduced by the manner by which this decoding needs to be performed, in that, all of the edge messages with respect to the check node are updated, then all of the edge messages with respect to the bit node are updated, and continuing on alternatively and successively (as necessary) between the bit nodes and the check nodes. This can result in a certain degree of slow processing of the receiver end (e.g., decoder end) of a communication link. As such, there continues to be an ever-present need in the art for approaches by which the iterative decoding processing of LDPC coded signals may be performed in a faster and more efficient manner.